Listing The Circuit, Global Nodes, Subcircuit Definitions And Subcircuit Instances
A circuit consists of modules (subcircuit instances). One module is always present. That is the top
level circuit (named xtopinst_). Its definition is named topdef_. There is always only one xtopinst_
module. The top level circuit and other modules may comprise multiple sub-modules (sub circuit
instances). Modules (subcircuit instances) can be nested. Definitions cannot be nested (i.e. one
cannot define a subcircuit inside a subcircuit definition).
Consider the following netlist:
TESTNET
.param testp1=100
.param testp2=testp1*9
* Complex vector (1,0);(2,0);(3,1)
.param vec1=(1;2;(3,1))
* Real vector 1;2;3
.param vec2=(1;2;3)
.global vss vdd
.subckt test1 1 2 3
r1 1 2 1
r2 2 3 1
.ends
.subckt test 1 2 3 param: a=5*testp2 b c=vec1 d=9 e f=vec2 g
.param hello = 1
.param aw = 2
.param u=5
r1 1 2 1
r2 2 3 1
.ends
xtestsub 50 60 0 test param: b=1 e=vec1 d=1 g=1
.subckt tcres n1 n2 param: r tc1=0 tc2=0 temp=27 tnom=27
r1 n1 n2 {r} rm temp={temp}
.model rm r tc1={tc1} tc2={tc2} tnom={tnom}
.ends
.subckt vdiv up down out param: k=0.5 r=1k
.param upr=r*(1-k)
.param dnr=r*k
.param tclin=0.01
x1 up out tcres param: r=upr tc1=tclin
x2 out down tcres param: r=dnr tc1=tclin*2
.ends
xdiv 1 0 out vdiv param: k=0.25 r={10k*testp1}
rtop 10 0 1
.control
echo hello
.endc
.end
The top level circuit (xtopinst_) consists of resistor instance rtop and modules xdiv and xtestsub.
The definition of xtopinst_ is topdef_. The definition of xdiv is vdiv and the definition of
xtestsub is test.
xdiv comprises modules x1:xdiv and x2:xdiv. The definition of x1:xdiv and x2:xdiv is tcres.
x1:xdiv and x2:xdiv both consist of a resistor instance (r1:x1:xdiv, r1:x2:xdiv) and a resistor
model (rmod:x1:xdiv, rmod:x2:xdiv).
The following commands are available for getting information on the
active circuit's netlist:
listing
or
listing logical
The latter two commands display the netlist along with line numbers. The .control
block is ommited.
listing physical
Displays the physical listing (all lines from input file(s) including the .control
block and empty lines) with line numbers.
listing deck
Same as previous except that line numbers are ommited.
listing global
Displays all global nodes. For the TESTNET netlist the result is:
Spice Opus 19 -> listing global
Global nodes: vss vdd
listing subdef
Displays a list of all subcircuit definitions. For the TESTNET listing it displays:
Spice Opus 21 -> listing subdef
Active subcircuit definitions:
vdiv
tcres
test
test1
topdef_
----
topdef_ is the top level circuit definition.
listing subdef name1 name2 ...
Displays the information on listed subcircuit definitions. Example:
Spice Opus 24 -> listing subdef topdef_ tcres vdiv
Instances of topdef_ :
xtopinst_
Definition of topdef_ :
Terminals:
--none--
Parameters:
--none--
Parametric expressions:
testp1 = 100
testp2 = testp1*9
vec1 = (1;2;(3,1))
vec2 = (1;2;3)
Elements:
xtestsub 50 60 0 test param: b=1 e=vec1 d=1 g=1
xdiv 1 0 out vdiv param: k=0.25 r={10k*testp1}
rtop 10 0 1
----
Instances of tcres :
x2:xdiv
x1:xdiv
Definition of tcres :
Terminals:
n1 n2
Parameters:
r
tc1 = 0
tc2 = 0
temp = 27
tnom = 27
Parametric expressions:
--none--
Elements:
r1 n1 n2 {r} rm temp={temp}
.model rm r tc1={tc1} tc2={tc2} tnom={tnom}
----
Instances of vdiv :
xdiv
Definition of vdiv :
Terminals:
up down out
Parameters:
k = 0.5
r = 1000
Parametric expressions:
upr = r*(1-k)
dnr = r*k
tclin = 0.01
Elements:
x1 up out tcres param: r=upr tc1=tclin
x2 out down tcres param: r=dnr tc1=tclin*2
----
For every subcircuit definition the list of instances is printed along with the terminals, parameters,
default values, parametric expressions (.PARAM clauses) and list of elements.
listing sub
Displays the list of all instances sorted by their respective subcircuit definitions. Example:
Spice Opus 25 -> listing sub
Subcircuit instances of vdiv:
xdiv
Subcircuit instances of tcres:
x2:xdiv
x1:xdiv
Subcircuit instances of test:
xtestsub
Subcircuit instances of test1:
--none--
Subcircuit instances of topdef_:
xtopinst_
listing sub name1 name2 ...
Displays information on listed subcircuit instances. Example:
Spice Opus 31 -> listing sub xtopinst_ xtestsub xdiv x2:xdiv
Subcircuit instance xtopinst_ :
Definition : topdef_
Instantiated in top level circuit
Connections (model -> instance) :
--none--
Parameters :
--none--
----
Subcircuit instance xtestsub :
Definition : test
Instantiated in top level circuit
Connections (model -> instance) :
1 -> 50
2 -> 60
3 -> 0
Parameters :
a = (dfl) 4500
b = 1
c = (dfl) ((1,0);(2,0);(3,1))
d = 1
e = ((1,0);(2,0);(3,1))
f = (dfl) (1;2;3)
g = 1
----
Subcircuit instance xdiv :
Definition : vdiv
Instantiated in top level circuit
Connections (model -> instance) :
up -> 1
down -> 0
out -> out
Parameters :
k = 0.25
r = 1e+006
----
Subcircuit instance x2:xdiv :
Definition : tcres
Instantiated in xdiv
Connections (model -> instance) :
n1 -> out
n2 -> 0
Parameters :
r = 250000
tc1 = 0.02
tc2 = (dfl) 0
temp = (dfl) 27
tnom = (dfl) 27
----
For each instance the name of the definition is printed along with the place where it is
instantiated, connections and parameters. If a parameter is set to the default (ommited
at subcircuit call) (dfl) is printed in front of the value.
There is always one top level subcircuit (topdef_) instance named xtopinst_.
Altering/reading subcircuit parameters from NUTMEG
To access a subcircuit parameter from NUTMEG use the following syntax:
@xname[parameter]
Examples:
* Prints the a parameter for subcircuit instance x1:xamp1
print @x1:xamp1[a]
* Sets the a parameter for subcircuit instance x1:xamp1 to 10
let @x1:xamp1[a]=10
All instances/models/subcircuits in the subcircuit instance for which the parameter is
altered are reparsed and affected parameters recalculated.
Automatic model selection (binning) for BSIM3v3 MOSFET device model
BSIM3v3 MOSFET (level = 53) device models are usually valid only for a
specified range of transistor channel widths and lengths. Valid range is given by
lmin, lmax, wmin and wmax model parameters and
instance's width and length are given by its w and l parameters.
Consequently relations lmin < l < lmax and wmin <
w < wmax should hold. In general if channel is changed outside
specified w,l range another model covering new dimensions should be
selected. To get continuous passages on borders between different width and length
ranges binning technique is used (defined by binning model parameters).
Appropriate model selection can be left to SpiceOpus. It searches through the
given models for a suitable one. Model reference names have the following syntax:
<model_name>_<bin_name>
SpiceOpus searches among models with the same model name and different bin
names. Transistor instance must refer to one of the models with its complete name
(including bin name). It is not necessary for the instance to point to the right
model. The model will automatically be selected by SpiceOpus.
Example:
...
m1 drain gate source bulk nmod_1 l=4um w=120um ...
...
.model nmod_1 nmos level=53 lmin=1u lmax=5u wmin=1u wmax=100u ...
.model nmod_2 nmos level=53 lmin=5u lmax=10u wmin=1u wmax=100u ...
.model nmod_3 nmos level=53 lmin=1u lmax=5u wmin=100u wmax=250u ...
.model nmod_4 nmos level=53 lmin=5u lmax=10u wmin=100u wmax=250u ...
...
In the above example mod_1 is not appropriate model for instance m1.
It will be automatically changed to mod_3.