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CACD Group
updated 2001.09.17

Frequently Asked Questions

bullet In the circuit netlist I have a resistor instance R1 1 0 1kOhm. Why does the command print @R1 cause two error messages namely Error: instance 'R1' not found. and Error: @R1: no such vector., instead of printing the resistance of R1? The problem lies in the case sensitivity of the circuit netlist and the NUTMEG command set. The netlist syntax (element definitions, .model and .subckt statements) is case insensitive. It is always converted to lower case before parsing. For example the lines: R1 1 0 1kOhm
R1 1 0 1KOHM
r1 1 0 1Kohm etc.
are all converted into the same lowercase line: r1 1 0 1kohm In all above cases the simulator knows a resistor named r1 and not R1. NUTMEG commands (issued in the .control block or interactively at Spice Opus prompt) on the other hand are case sensitive. Therefore print, PRINT, Print etc. are different commands. For example executing a command: PRINT @R1 will cause Spice Opus to answer with the error message: PRINT: no such command available in Spice Opus The reason is that the simulator really does not know the command PRINT, it knows only print. Because it also does not know an element R1, but only r1, the command print @R1 will not work. To print a resistors resistance the command print @r1 should be issued. To avoid this kind of errors it is best to stick consequently to lower case (in the circuit netlist as well as the NUTMEG commands).
bulletHow can the output printed in SPICE OPUS Command Window be redirected to somewhere else (output file)? Output can not be redirected from the Command Window. But it can also be printed into an arbitrary file by using the -o option in the command line. This way output is printed into a file and into the SPICE OPUS Command Window at the same time. The -o option was originally coded but not documented in Berkeley's User's Manual. For instance starting SPICE OPUS with spice3.exe -o out.txtlogs all its output into file out.txt. If also an input file with circuit netlist and NUTMEG commands is provided, and the last command is quit, than starting SPICE OPUS with spice3.exe -o out.txt input_file.ciris similar to batch mode running of SPICE OPUS (-b option). bulletI put an .op command in my input file with circuit netlist (see listing below). Why can't I print the resulting node voltage v(2) with command print v(2), after the file is loaded into SPICE OPUS? simple circuit
v1 1 0 dc 5V
r1 1 2 2
r2 2 0 3
.op
.end

When the input file is loaded (source command) the circuit netlist is parsed and NUTMEG commands (commands inside .control .endc blocks) are executed. In the listing above there are no NUTMEG commands. Dot commands (in our case .op) are not executed. Because the operating point analysis was not made, the node voltage v(2) can't be printed respectively.

Dot commands are obsolete in Berkeley's SPICE3 versions. They were used in SPICE2 versions, where simulator ran in batch mode and it wrote the results to an output file, which were than usually viewed with a post processing program.

In order to execute the dot commands, the run command can be used. The dot commands can also be issued as Nutmeg commands inside .control block. In our case instead of .op one should use: .control
op
.endc
bulletBatch mode running of program documented in Berkeley's documentation for SPICE2 versions does not work for SPICE OPUS. Can SPICE OPUS run in batch mode? SPICE OPUS can run in batch mode by using the -b option on the command line. Starting SPICE OPUS by spice3.exe -b in.cirruns the program in batch mode. It reads the circuit described in the in.cir file and executes all NUTMEG commands, but it does not execute dot commands as SPICE2 versions do (see explanation about dot commands above). When all commands are executed the program terminates. Analyses results are not saved to an output file by default.

Lets take a closer look at the following example. Let the listing of in.cir be as follows: simple circuit
v1 1 0 dc 5V
r1 1 2 2
r2 2 0 3
.op
.end
If the user runs SPICE OPUS in batch mode with the command line from above, then nothing happens. Circuit is read into the program and the program stops, since the dot commands are not executed. To get results in an output file, the input file has to be slightly changed. First to perform the desired analyses run command can be used (executes dot commands), or dot commands can be issued as NUTMEG commands. To write results into the output file write command has to be used. So the updated listing of in.cir could be as follows (dot command .op is issued as NUTMEG command): simple circuit
.control
op
write
.endc
v1 1 0 dc 5V
r1 1 2 2
r2 2 0 3
.end
In this case results of operating point analysis are written to the output file, with default name rawspice.raw.
bulletHow can I get fixed time step in transient analysis? Time step in transient analysis is always dynamically adjusted. So it will never stay constant through the analysis and time points will not be equidistant respectively. But there are two parameters, that time step can be controlled with. And the results can also be linearised afterwards. As it is well known the tran command has the following syntax: tran tstep tstop[ tstart[ tmax]][ uic]Parameters tstep and tmax are related with time step. The second parameter is an upper limit, so the time step can never be greater than tmax. This way a minimal time precision can be guaranteed. The first parameter (tstep) does not directly influence to transient analysis (it is only used for calculating the default value of tmax when it is not given). But it takes place when the linearize command is used. If one issue linearize after the tran command, then new plot (set of results) is created. All vectors are linearised to a fixed time step defined by tstep parameter. This way one can obtain transient results with equidistant time points suitable for fast Fourier transformation for example. bulletI optimised the circuit with the steepest descent method. In optimize plot generated by optimize command I can see, that there are points with even lower cost function value than one reported at the end of optimisation process. Why it is not the lowest point reported as optimal one? If the expressions for gradient components are not given, then the gradient of cost function at the current point is calculated numerically. This means, that the circuit is analysed in points, slightly biased from the current point (for e in each co-ordinate direction). These analyses are saved in the resulting optimize plot, and of course can produce lower cost function value that it is in current point. But further, when optimisation process proceeds in negative gradient direction even lower cost values should be found. If cost function increases in negative gradient direction, then the current point is declared as optimal, regardless of lower points found during gradient calculation. One could ask how can cost function increase in the calculated direction, if lower values were found while determining this same direction. Those cases are rare indeed, but the cost function value can descend in two co-ordinate directions and ascend in the direction between them (negative gradient direction). bulletI want to calculate DC characteristics of a MOSFET device (see netlist below). When they are plotted some linear lines show up, which should not be there. How can the characteristics be plotted properly?
 dc mosfet characteristics
 .control
 dc vds 0 10V 0.5V vgs 0 5V 1V
 plot -i(vds)
 .endc
 vgs gate 0 dc 0
 vds drain 0 dc 0
 m1 drain gate 0 0 nchannel
 .model nchannel nmos
 .end
      
The DC analysis issued above produces results packed in 21 × 6 = 126 points long vectors. First 21 points correspond to vgs = 0, second 21 to vgs = 1V etc. When one plots the results, 126 points long vector(s) is(are) plotted. plot command does not know, that for example vector i(vds) represents six subvectors. It just plots its points connected with lines, which produces unwanted linear lines.

Resulting vector has to be break apart into six subvectors to remove linear lines. This can be achieved by forming six new vectors named ivg0, ivg1, … ivg5, which can then be plotted. So plot command in the above .control block should be replaced with the following commands: let ivgs0 = -i(vds)[  0, 20]
let ivgs1 = -i(vds)[ 21, 41]
let ivgs2 = -i(vds)[ 42, 62]
let ivgs3 = -i(vds)[ 63, 83]
let ivgs4 = -i(vds)[ 84,104]
let ivgs5 = -i(vds)[105,125]
plot ivgs0 ivgs1 ivgs2 ivgs3 ivgs4 ivgs5
bulletIs there a way to control options from the SPICE OPUS command line interface? If set a particular option via the .options line in the cir file, can its value be viewed and changed after the file is loaded? Any option value can be viewed by set command without arguments. If one type set, all variables are displayed. Some of them have + sign in front of them. Those are the simulator variables that are normally set with .options line in the netlist file. Options (variables with + sign) can also be altered or set by using: set variable_name = valueNote also that the same effect can be achieved by using let command with the following syntax: let @@@simulator_variable_name = expressionThe second way of setting simulator variables is even more flexible, because an arbitrary NUTMEG expression can be used. The options can also be deleted by using the unset command: unset variable_nameIf a particular simulator option is not set, then SPICE OPUS will use the default values. bulletHow can I get the current through an arbitrary branch of the circuit? Spice Opus (and other Spices in general) can print currents, which flow through voltage sources. They can be accessed in two ways: i(voltage_source_name)or voltage_source_name#branch(Note that lowercase letters are used in Nutmeg.)
This way currents in voltage source branches are automatically accessible. If one wants to measure a particular current in a non voltage source branch, voltage source with 0V (short circuit) has to be added in serial. This does not actually change the circuit, it stays the same. Now, after the analysis is done, one can get the current through the 0V voltage source, which is wanted branch current at the same time, with the above syntax.
bulletHow the results from the ac analysis can be plotted in an ordinary used units (dB for magnitude and degrees for phase)? Lets say out is the output node name of the analysed circuit, and in is the input node with unity input ac source to the ground. When the ac analysis is performed v(out) actually represents the ratio v(out)/v(in), because v(in) = 1V. Gain in dB (that is 20log(v(out)/v(in))), and phase in degrees (that is arctg(imag(v(out)/v(in))/real(v(out)/v(in)))) can be plotted by: set units = degrees
plot db(v(out)) ph(v(out))
Nutmeg functions db and ph calculates the expressions for the gain and phase written above. units variable defines the units for the trigonometric functions (default are radians), so in our case the phase is calculated in degrees.
Instead of the above lines one can also achieve the same with simply: plot v(out)v(out) is a complex vector and only its real part is plotted by default (like in original Berkeley's Spice). For displaying gain in dB options Graph/Magnitude and Graph/Units/Magnitude: dB(20log10) have to be chosen. And for displaying phase in degrees Graph/Phase and Graph/Units/Angle: deg have to be chosen.
bulletWhen I run SPICE OPUS it allways prints a message Note: can't find init file. regardless of the path written in the environment file. How can I fix that? SPICE OPUS first tries to open environment file in its working direcory. The first message printed should be Environment file found. Setting environment variables. If this message is not issued, then the environment file was not found, and the default paths are assumed.
The SPICE OPUS' init file is named spinit and it should be in the scripts subdirectory, which should reside in the directory specified by SPICE_LIB_DIR line in the environment file.
bulletHow can I model non-linear resistance, capacitance or inductance? Non-linear element can be defined in two different ways. For resistance u(i) or i(u) characteristic can be given, for capacitance q(u) or u(q) and for inductance i(y) or y(i) characteristic. All six cases are depicted in figure below. Of course non-linear controlled sources (B) has to be used.

bulletWhat analyses can be used in optimize analysis statements? An arbitrary Nutmeg commands can be used in optimize analysis block. That includes all analysis commands. The commands will be executed every iteration of optimisation procedure to provide the results for calculating the cost function. They will be performed in an order defined with numbers after optimize analysis. bulletIf channel width/length of a MOSFET are the optimisation parameters, do the drain/source perimeters/areas change automatically corresponding to the width/length? MOSFET drain/source perimeters/areas are not corrected when width/length of the channel is changed. There are also some model parameters in some levels, which depend on channel width/length (e.g. parameter lambda for MOS2 - level = 2) and are not corrected as well. All those parameters should be set manually in the optimize analysis statements prior to any circuit analysis. Example:
  *** setting optimisation parameters ***
  optimize parameter 0 @m1[w] low 4u high 200u initial 4.2u
  optimize parameter 1 @m1[l] low 4u high 40u  initial 4.3u
     ...

  *** setting width dependent parameters in every iteration ***
  optimize analysis 0  let @m2[w]  = @m1[w]
  optimize analysis 1  let @m2[l]  = @m1[l]
  optimize analysis 2  let @m1[ad] = 9e-6 * (@m1[w] + 8e-7)
  optimize analysis 3  let @m2[ad] = 9e-6 * (@m1[w] + 8e-7)
  optimize analysis 4  let @m1[as] = 9e-6 * (@m1[w] + 8e-7)
  optimize analysis 5  let @m2[as] = 9e-6 * (@m1[w] + 8e-7)
  optimize analysis 6  let @m1[pd] = 18e-6 + (@m1[w] + 8e-7)
  optimize analysis 7  let @m2[pd] = 18e-6 + (@m1[w] + 8e-7)
  optimize analysis 8  let @m1[ps] = 18e-6 + (@m1[w] + 8e-7)
  optimize analysis 9  let @m2[ps] = 18e-6 + (@m1[w] + 8e-7)
  optimize analysis 10 let @@pch1[lambda] = 1 / (8.3 * (@m1[l] * 1e6)^1.14)
  optimize analysis 11 tran ...
  
In the example above we have for instance two equal transistors m1 and m2 modelled with model pch1 which is MOSFET level = 2 (circuit netlist is not included). Channel dimensions of m1 are the optimisation parameters. Because m2 and m1 are equal the dimensions of m2 are changed in first two optimize analysis statements. Then all perimeters/areas are set for both transistors (the expressions are defined with process technology). Also the model parameter lambda is corrected because of change of channel length. A detailed knowledge of the model is required here. But usually model parameters do not need to be changed, since they are valid for some range of channel widths/lengths.
bulletThere seems to be an inconsistency in the optimisation part of the SpiceOpus. Every time I run the optimisation for my circuit it comes out with different values for the parameters. Why? The optimisation is a process of finding minimum of a given cost function. If the cost function has more than one local minimum or cost function is 'numerically noisy' or the global minimum is not very distinctive or the method has bad convergence etc., then there is no guarantee that the optimisation will always find the global minimum from an arbitrary initial point. In many optimisation methods there is also some random behaviour built in to improve the robustness of a particular method. So it is possible to get different solutions with the same method launched from the same initial point in subsequent optimisation runs. That is also desired because each solution (if the method converged well then the solution is some local minimum) should give some additional information about the circuit to the designer. Notice also that the initial point is set to new values after each optimisation run. bulletIs m parameter used with BSIM3v3 MOSFET model (level = 7 in SpiceOpus) a true parallel topology parameter (e.g. m * Ids) or is it a geometrical scaling factor (e.g. m * w)? The m parameter used with BSIM3v3 is true topological parameter. It defines m transistors in parallel, which only approximately behaves as m-times wider transistor. This way the designer automatically gets m transistors in parallel so he does not need m identical lines in the circuit netlist. m transistors in parallel in general behaves differently then m-times wider transistor because of non-linear dependencies of channel width.
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